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00008 #ifndef lestes__backend_v2__workers__spillgen_g_hh__included
00009 #define lestes__backend_v2__workers__spillgen_g_hh__included
00010
00011 #include <lestes/std/list.hh>
00012 #include <lestes/std/set.hh>
00013 #include <lestes/backend_v2/common.hh>
00014 #include <lestes/backend_v2/workers/worker_base.g.hh>
00015
00016 #include <lestes/std/objectize_macros.hh>
00017 package(lestes);
00018 package(backend_v2);
00019 package(structs);
00020 class func_data;
00021 end_package(structs);
00022 end_package(backend_v2);
00023 end_package(lestes);
00024
00025 package(lestes);
00026 package(backend_v2);
00027 package(intercode);
00028 class ge_pi;
00029 end_package(intercode);
00030 end_package(backend_v2);
00031 end_package(lestes);
00032
00033 package(lestes);
00034 package(backend_v2);
00035 package(intercode);
00036 class ge_operand_mem;
00037 end_package(intercode);
00038 end_package(backend_v2);
00039 end_package(lestes);
00040
00041 package(lestes);
00042 package(backend_v2);
00043 package(intercode);
00044 class ge_operand_reg;
00045 end_package(intercode);
00046 end_package(backend_v2);
00047 end_package(lestes);
00048
00049 package(lestes);
00050 package(backend_v2);
00051 package(workers);
00052 class alloc_interval;
00053 end_package(workers);
00054 end_package(backend_v2);
00055 end_package(lestes);
00056
00057 package(lestes);
00058 package(md);
00059 package(instructions);
00060 class tm_instr_op_reg_base;
00061 end_package(instructions);
00062 end_package(md);
00063 end_package(lestes);
00064
00065 package(lestes);
00066 package(backend_v2);
00067 package(intercode);
00068 class pi_mem_factory;
00069 end_package(intercode);
00070 end_package(backend_v2);
00071 end_package(lestes);
00072
00073 package(lestes);
00074 package(md);
00075 package(registers);
00076 class tm_register;
00077 end_package(registers);
00078 end_package(md);
00079 end_package(lestes);
00080
00081 package(lestes);
00082 package(md);
00083 package(types);
00084 class tm_data_type_base;
00085 end_package(types);
00086 end_package(md);
00087 end_package(lestes);
00088
00089 package(lestes);
00090 package(md);
00091 package(registers);
00092 class move_generator;
00093 end_package(registers);
00094 end_package(md);
00095 end_package(lestes);
00096
00097 package(lestes);
00098 package(backend_v2);
00099 package(workers);
00100 class basic_block;
00101 end_package(workers);
00102 end_package(backend_v2);
00103 end_package(lestes);
00104
00105 package(lestes);
00106 package(backend_v2);
00107 package(workers);
00108
00109
00110 class spillgen;
00111 class spillgen_group;
00112
00113
00114
00115 class spillgen : public worker_base {
00116 public:
00117
00118 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > active_intervals_get() const;
00119
00120
00121 void active_intervals_set(const ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > & );
00122
00123
00124 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > expired_intervals_get() const;
00125
00126
00127 void expired_intervals_set(const ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > & );
00128
00129
00130 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > waiting_intervals_get() const;
00131
00132
00133 void waiting_intervals_set(const ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > & );
00134
00135
00136 ptr< ::lestes::std::set< ulint > > free_registers_get() const;
00137
00138
00139 void free_registers_set(const ptr< ::lestes::std::set< ulint > > & );
00140
00141
00142 ptr< ::lestes::std::set< ulint > > used_registers_get() const;
00143
00144
00145 void used_registers_set(const ptr< ::lestes::std::set< ulint > > & );
00146
00147
00148 ptr< ::lestes::std::set< ulint > > all_registers_get() const;
00149
00150
00151 void all_registers_set(const ptr< ::lestes::std::set< ulint > > & );
00152
00153
00154 ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::workers::alloc_interval > > > register_owners_get() const;
00155
00156
00157 void register_owners_set(const ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::workers::alloc_interval > > > & );
00158
00159
00160 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::pi_mem_factory > > > free_spill_spaces_get() const;
00161
00162
00163 void free_spill_spaces_set(const ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::pi_mem_factory > > > & );
00164
00165
00166 ptr< ::lestes::md::registers::move_generator > move_gen_get() const;
00167
00168
00169 void move_gen_set(const ptr< ::lestes::md::registers::move_generator > &);
00170
00171
00172 bool registers_freed_get() const;
00173
00174
00175 void registers_freed_set(bool);
00176
00177
00178 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::pi_mem_factory >, srp< ::lestes::backend_v2::intercode::ge_pi > > > spill_space_last_use_get() const;
00179
00180
00181 void spill_space_last_use_set(const ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::pi_mem_factory >, srp< ::lestes::backend_v2::intercode::ge_pi > > > & );
00182
00183
00184 ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::intercode::ge_pi > > > register_last_use_get() const;
00185
00186
00187 void register_last_use_set(const ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::intercode::ge_pi > > > & );
00188
00189
00190 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< ::lestes::backend_v2::workers::alloc_interval > > > op2interval_get() const;
00191
00192
00193 void op2interval_set(const ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< ::lestes::backend_v2::workers::alloc_interval > > > & );
00194
00195
00196 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< spillgen_group > > > op2group_get() const;
00197
00198
00199 void op2group_set(const ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< spillgen_group > > > & );
00200
00201
00202 ptr< ::lestes::std::list< srp< spillgen_group > > > groups_get() const;
00203
00204
00205 void groups_set(const ptr< ::lestes::std::list< srp< spillgen_group > > > & );
00206
00207
00208 ptr< ::lestes::std::set< ulint > > regs_used_by_groups_get() const;
00209
00210
00211 void regs_used_by_groups_set(const ptr< ::lestes::std::set< ulint > > & );
00212
00213
00214 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > curr_generated_instructions_get() const;
00215
00216
00217 void curr_generated_instructions_set(const ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > & );
00218
00219 void process();
00220
00221 ptr< ::lestes::backend_v2::structs::func_data > get_result();
00222
00223 ptr< ::lestes::backend_v2::intercode::ge_pi > find_last_use_of_register(ulint regid);
00224
00225 void set_last_use_of_register(ulint regid, ptr< ::lestes::backend_v2::intercode::ge_pi > ge);
00226
00227 void process_instruction(ptr< ::lestes::backend_v2::intercode::ge_pi > ge, ptr<list<srp< ::lestes::backend_v2::intercode::ge_pi > > > output, list<srp< ::lestes::backend_v2::intercode::ge_pi > >::iterator insert_pos);
00228
00229 void generate_spill_code(ptr< ::lestes::backend_v2::intercode::ge_pi > ge, ptr<list<srp< ::lestes::backend_v2::intercode::ge_pi > > > output, list<srp< ::lestes::backend_v2::intercode::ge_pi > >::iterator insert_pos);
00230
00231 ptr<vector<srp< ::lestes::backend_v2::intercode::ge_pi > > > generate_backup_code(ptr< ::lestes::backend_v2::intercode::ge_pi > ge, ptr< spillgen_group > group, ptr<set<srp< ::lestes::backend_v2::workers::alloc_interval > > > reg_orig_owners);
00232
00233 ptr<vector<srp< ::lestes::backend_v2::intercode::ge_pi > > > generate_restore_code(ptr< ::lestes::backend_v2::intercode::ge_pi > ge, ptr< spillgen_group > group, ptr<set<srp< ::lestes::backend_v2::workers::alloc_interval > > > reg_orig_owners);
00234
00235 ptr<vector<srp< ::lestes::backend_v2::intercode::ge_pi > > > generate_load_code(ptr< ::lestes::backend_v2::intercode::ge_pi > ge, ptr< spillgen_group > group, ptr< ::lestes::backend_v2::workers::alloc_interval > interval, ptr< ::lestes::backend_v2::intercode::ge_operand_reg > operand, ptr< ::lestes::md::registers::tm_register > reg);
00236
00237 ptr<vector<srp< ::lestes::backend_v2::intercode::ge_pi > > > generate_store_code(ptr< ::lestes::backend_v2::intercode::ge_pi > ge, ptr< spillgen_group > group, ptr< ::lestes::backend_v2::workers::alloc_interval > interval, ptr< ::lestes::backend_v2::intercode::ge_operand_reg > operand, ptr< ::lestes::md::registers::tm_register > reg);
00238
00239 void insert_code_to_bb(ptr< ::lestes::backend_v2::workers::basic_block > bb, ptr<vector<srp< ::lestes::backend_v2::intercode::ge_pi > > > code, bool back);
00240
00241 void free_group_resources();
00242
00243 ptr< ::lestes::backend_v2::intercode::ge_pi > interval_find_previous_instruction(ptr< ::lestes::backend_v2::workers::alloc_interval > interval, ulint pos);
00244
00245 ptr< ::lestes::backend_v2::intercode::ge_pi > interval_find_next_instruction(ptr< ::lestes::backend_v2::workers::alloc_interval > interval, ulint pos);
00246
00247 ptr<set<srp< ::lestes::backend_v2::workers::alloc_interval > > > find_register_owners(ptr< ::lestes::md::registers::tm_register > reg);
00248
00249 ptr<set<srp< ::lestes::backend_v2::workers::spillgen_group > > > find_groups_by_reg(ptr< ::lestes::md::registers::tm_register > reg);
00250
00251 void allocate_regs_for_groups();
00252
00253 void allocate_reg_for_group(ptr< spillgen_group > group);
00254
00255 void steal_register_from_siblings(ptr< spillgen_group > thief, ptr<set<ulint> > allowed_regs);
00256
00257 bool identify_groups(ptr< ::lestes::backend_v2::intercode::ge_pi > ge);
00258
00259 ptr<set<ulint> > filter_regs_by_data_type(ptr<set<ulint> > reg_set, ulint type);
00260
00261 void setup_registers();
00262
00263 void find_free_registers();
00264
00265 ptr< ::lestes::backend_v2::intercode::pi_mem_factory > get_free_spill_space(ptr< ::lestes::md::types::tm_data_type_base > type);
00266
00267 bool expire_old_intervals(ulint curr_point);
00268
00269 bool activate_waiting_intervals(ulint curr_point);
00270
00271 void set_instruction_property(ptr<vector<srp< ::lestes::backend_v2::intercode::ge_pi > > > instrs, ulint property_id, lstring property_value);
00272
00273
00274
00275 static ptr< spillgen > create (
00276 ptr< ::lestes::backend_v2::structs::func_data > a__worker_base__data,
00277 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__active_intervals,
00278 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__expired_intervals,
00279 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__waiting_intervals,
00280 ptr< ::lestes::std::set< ulint > > a__spillgen__free_registers,
00281 ptr< ::lestes::std::set< ulint > > a__spillgen__used_registers,
00282 ptr< ::lestes::std::set< ulint > > a__spillgen__all_registers,
00283 ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__register_owners,
00284 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::pi_mem_factory > > > a__spillgen__free_spill_spaces,
00285 ptr< ::lestes::md::registers::move_generator > a__spillgen__move_gen,
00286 bool a__spillgen__registers_freed,
00287 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::pi_mem_factory >, srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen__spill_space_last_use,
00288 ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen__register_last_use,
00289 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__op2interval,
00290 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< spillgen_group > > > a__spillgen__op2group,
00291 ptr< ::lestes::std::list< srp< spillgen_group > > > a__spillgen__groups,
00292 ptr< ::lestes::std::set< ulint > > a__spillgen__regs_used_by_groups,
00293 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen__curr_generated_instructions);
00294
00295
00296 static ptr< spillgen > create (
00297 ptr< ::lestes::backend_v2::structs::func_data > a__worker_base__data);
00298
00299
00300
00301
00302 virtual ptr<reflection_list> reflection_get() const;
00303
00304 virtual ptr<field_list_list> field_values_get() const;
00305
00306 protected:
00307
00308 spillgen (
00309 ptr< ::lestes::backend_v2::structs::func_data > a__worker_base__data,
00310 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__active_intervals,
00311 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__expired_intervals,
00312 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__waiting_intervals,
00313 ptr< ::lestes::std::set< ulint > > a__spillgen__free_registers,
00314 ptr< ::lestes::std::set< ulint > > a__spillgen__used_registers,
00315 ptr< ::lestes::std::set< ulint > > a__spillgen__all_registers,
00316 ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__register_owners,
00317 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::pi_mem_factory > > > a__spillgen__free_spill_spaces,
00318 ptr< ::lestes::md::registers::move_generator > a__spillgen__move_gen,
00319 bool a__spillgen__registers_freed,
00320 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::pi_mem_factory >, srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen__spill_space_last_use,
00321 ptr< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen__register_last_use,
00322 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< ::lestes::backend_v2::workers::alloc_interval > > > a__spillgen__op2interval,
00323 ptr< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< spillgen_group > > > a__spillgen__op2group,
00324 ptr< ::lestes::std::list< srp< spillgen_group > > > a__spillgen__groups,
00325 ptr< ::lestes::std::set< ulint > > a__spillgen__regs_used_by_groups,
00326 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen__curr_generated_instructions);
00327
00328
00329 virtual void gc_mark();
00330
00331 private:
00332
00333 srp< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > active_intervals;
00334
00335 srp< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > expired_intervals;
00336
00337 srp< ::lestes::std::vector< srp< ::lestes::backend_v2::workers::alloc_interval > > > waiting_intervals;
00338
00339 srp< ::lestes::std::set< ulint > > free_registers;
00340
00341 srp< ::lestes::std::set< ulint > > used_registers;
00342
00343 srp< ::lestes::std::set< ulint > > all_registers;
00344
00345 srp< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::workers::alloc_interval > > > register_owners;
00346
00347 srp< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::pi_mem_factory > > > free_spill_spaces;
00348
00349 srp< ::lestes::md::registers::move_generator > move_gen;
00350 bool registers_freed;
00351
00352 srp< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::pi_mem_factory >, srp< ::lestes::backend_v2::intercode::ge_pi > > > spill_space_last_use;
00353
00354 srp< ::lestes::std::map< ulint, srp< ::lestes::backend_v2::intercode::ge_pi > > > register_last_use;
00355
00356 srp< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< ::lestes::backend_v2::workers::alloc_interval > > > op2interval;
00357
00358 srp< ::lestes::std::map< srp< ::lestes::backend_v2::intercode::ge_operand_reg >, srp< spillgen_group > > > op2group;
00359
00360 srp< ::lestes::std::list< srp< spillgen_group > > > groups;
00361
00362 srp< ::lestes::std::set< ulint > > regs_used_by_groups;
00363
00364 srp< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > curr_generated_instructions;
00365 static ptr<reflection_list> reflection;
00366
00367 };
00368
00369
00370
00371 class spillgen_group : public ::lestes::std::object {
00372 public:
00373
00374 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_operand_reg > > > operands_get() const;
00375
00376
00377 void operands_set(const ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_operand_reg > > > & );
00378
00379
00380 ptr< ::lestes::std::set< ulint > > allowed_registers_get() const;
00381
00382
00383 void allowed_registers_set(const ptr< ::lestes::std::set< ulint > > & );
00384
00385
00386 ptr< ::lestes::std::set< ulint > > avail_regs_for_input_ops_get() const;
00387
00388
00389 void avail_regs_for_input_ops_set(const ptr< ::lestes::std::set< ulint > > & );
00390
00391
00392 ptr< ::lestes::std::set< ulint > > avail_regs_for_output_ops_get() const;
00393
00394
00395 void avail_regs_for_output_ops_set(const ptr< ::lestes::std::set< ulint > > & );
00396
00397
00398 ptr< ::lestes::md::registers::tm_register > reg_get() const;
00399
00400
00401 void reg_set(const ptr< ::lestes::md::registers::tm_register > &);
00402
00403
00404 ptr< spillgen_group > guarded_group_get() const;
00405
00406
00407 void guarded_group_set(const ptr< spillgen_group > &);
00408
00409
00410 bool is_input_get() const;
00411
00412
00413 void is_input_set(bool);
00414
00415
00416 bool is_output_get() const;
00417
00418
00419 void is_output_set(bool);
00420
00421
00422 ptr< ::lestes::backend_v2::intercode::ge_operand_mem > backup_space_get() const;
00423
00424
00425 void backup_space_set(const ptr< ::lestes::backend_v2::intercode::ge_operand_mem > &);
00426
00427
00428 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > backup_instructions_get() const;
00429
00430
00431 void backup_instructions_set(const ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > & );
00432
00433
00434 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > load_instructions_get() const;
00435
00436
00437 void load_instructions_set(const ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > & );
00438
00439
00440 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > store_instructions_get() const;
00441
00442
00443 void store_instructions_set(const ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > & );
00444
00445
00446 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > restore_instructions_get() const;
00447
00448
00449 void restore_instructions_set(const ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > & );
00450
00451
00452
00453 static ptr< spillgen_group > create (
00454 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_operand_reg > > > a__spillgen_group__operands,
00455 ptr< ::lestes::std::set< ulint > > a__spillgen_group__allowed_registers,
00456 ptr< ::lestes::std::set< ulint > > a__spillgen_group__avail_regs_for_input_ops,
00457 ptr< ::lestes::std::set< ulint > > a__spillgen_group__avail_regs_for_output_ops,
00458 ptr< ::lestes::md::registers::tm_register > a__spillgen_group__reg,
00459 ptr< spillgen_group > a__spillgen_group__guarded_group,
00460 bool a__spillgen_group__is_input,
00461 bool a__spillgen_group__is_output,
00462 ptr< ::lestes::backend_v2::intercode::ge_operand_mem > a__spillgen_group__backup_space,
00463 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__backup_instructions,
00464 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__load_instructions,
00465 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__store_instructions,
00466 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__restore_instructions);
00467
00468
00469 static ptr< spillgen_group > create (
00470 );
00471
00472
00473
00474
00475 virtual ptr<reflection_list> reflection_get() const;
00476
00477 virtual ptr<field_list_list> field_values_get() const;
00478
00479 protected:
00480
00481 spillgen_group (
00482 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_operand_reg > > > a__spillgen_group__operands,
00483 ptr< ::lestes::std::set< ulint > > a__spillgen_group__allowed_registers,
00484 ptr< ::lestes::std::set< ulint > > a__spillgen_group__avail_regs_for_input_ops,
00485 ptr< ::lestes::std::set< ulint > > a__spillgen_group__avail_regs_for_output_ops,
00486 ptr< ::lestes::md::registers::tm_register > a__spillgen_group__reg,
00487 ptr< spillgen_group > a__spillgen_group__guarded_group,
00488 bool a__spillgen_group__is_input,
00489 bool a__spillgen_group__is_output,
00490 ptr< ::lestes::backend_v2::intercode::ge_operand_mem > a__spillgen_group__backup_space,
00491 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__backup_instructions,
00492 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__load_instructions,
00493 ptr< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__store_instructions,
00494 ptr< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > a__spillgen_group__restore_instructions);
00495
00496
00497 virtual void gc_mark();
00498
00499 private:
00500
00501 srp< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_operand_reg > > > operands;
00502
00503 srp< ::lestes::std::set< ulint > > allowed_registers;
00504
00505 srp< ::lestes::std::set< ulint > > avail_regs_for_input_ops;
00506
00507 srp< ::lestes::std::set< ulint > > avail_regs_for_output_ops;
00508
00509 srp< ::lestes::md::registers::tm_register > reg;
00510
00511 srp< spillgen_group > guarded_group;
00512
00513 bool is_input;
00514
00515 bool is_output;
00516
00517 srp< ::lestes::backend_v2::intercode::ge_operand_mem > backup_space;
00518
00519 srp< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > backup_instructions;
00520
00521 srp< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > load_instructions;
00522
00523 srp< ::lestes::std::set< srp< ::lestes::backend_v2::intercode::ge_pi > > > store_instructions;
00524
00525 srp< ::lestes::std::vector< srp< ::lestes::backend_v2::intercode::ge_pi > > > restore_instructions;
00526 static ptr<reflection_list> reflection;
00527
00528 };
00529
00530
00531 end_package(workers);
00532 end_package(backend_v2);
00533 end_package(lestes);
00534
00535 #endif // lestes__backend_v2__workers__spillgen_g_hh__included